chiark / gitweb /
Merge branch 'fairphone-battery-case-v3'
[reprap-play.git] / fairphone-battery-case.scad
index 7921d7e53b5489d0f9b5e2c50fab304a32137626..7ca96540a315de7a9ffce93857eff24b364c16a4 100644 (file)
@@ -1,22 +1,27 @@
 // -*- C -*-
 
-mainwall_th = 2.5;
-smallwall_th = 1.5;
+mainwall_th = 3.0;
+smallwall_th = 2.0;
 
-seal_th = 0.3 + 0.6; // total gap for seal etc.
-behind_recess = 1.0;
+seal_th = 0.3 + 0.6 + 0.6; // total gap for seal etc.
+behind_recess = 1.5;
 
 recess_gap_end = 0.4;
 
 lid_edge_th = 0.5;
 
-battery_len = 66.55 + 0.75;
-battery_th = 6.55 + 0.75;
+battery_len = 66.55 + 1.25;
+battery_th = 6.55 + 0.75 - .90;
 battery_wdth = 44.38 + 0.75;
 
+battery_base_indent = 0.94 + 0.50;
+battery_base_indent_fromside_outside = 4;
+battery_base_indent_fromside_inside = 10;
+
 // for testing:
-battery_len = 3;
-battery_wdth = 15;
+//battery_len = 3;
+//battery_wdth = 15;
+//battery_base_indent_fromside_inside = 6;
 
 // calculated
 
@@ -60,7 +65,7 @@ bpp6 = [ bpp5[0], bpp9[1] ];
 lppE = [ lppA[0], bpp9[1] ];
 lppD = [ lppC[0], bpp9[1] ];
 
-module BaseHalfPlan(){
+module BaseHalfPlan(indent=0){
   polygon([ bpp0,
            bpp1,
            bpp2,
@@ -68,8 +73,8 @@ module BaseHalfPlan(){
            bpp4,
            bpp5,
            bpp6,
-           bpp7,
-           bpp8
+           bpp7 + indent * [1,0],
+           bpp8 + indent * [1,0]
            ]);
 }
 
@@ -114,6 +119,17 @@ module PlanDemo(){ ////toplevel
 module Base(){ ////toplevel
   ExtrudePlan(0,s1) BaseHalfPlan();
   ExtrudePlan(s0,s1) SideHalfPlan();
+  ExtrudePlan(s0 - battery_base_indent_fromside_inside,
+             s0 - battery_base_indent_fromside_outside
+             ) BaseHalfPlan(indent = battery_base_indent);
+}
+
+module BaseHalfTest(){ ////toplevel
+  intersection(){
+    Base();
+    translate([-100,0,-100])
+      cube([200,200,200]);
+  }
 }
 
 module Lid(){ ////toplevel