X-Git-Url: http://www.chiark.greenend.org.uk/ucgi/~ianmdlvl/git?a=blobdiff_plain;f=fairphone-battery-case.scad;h=1d703596282b71dd9f74163993ab27aaba739c22;hb=2b01bb74a9cc7fdd63e8fec2dbce55d8254de852;hp=921e1a59a9accca8e1a26a742472617447d29045;hpb=40357144ba6be92f304aefd95aa80fa0cd74efeb;p=reprap-play.git diff --git a/fairphone-battery-case.scad b/fairphone-battery-case.scad index 921e1a5..1d70359 100644 --- a/fairphone-battery-case.scad +++ b/fairphone-battery-case.scad @@ -3,7 +3,7 @@ mainwall_th = 3.0; smallwall_th = 2.0; -seal_th = 0.3 + 0.6 + 0.6; // total gap for seal etc. +seal_th = 0.3 + 0.6 + 0.6 - 0.4 - 0.4 + 0.2; // total gap for seal etc. behind_recess = 1.5; recess_gap_end = 0.4; @@ -18,8 +18,12 @@ battery_base_indent = 0.94 + 0.50; battery_base_indent_fromside_outside = 4; battery_base_indent_fromside_inside = 10; +handle_height = 3.5; +handle_inward = 10; +handle_len = 5; + // for testing: -//battery_len = 3; +battery_len = 3; //battery_wdth = 15; //battery_base_indent_fromside_inside = 6; @@ -34,9 +38,15 @@ bpp3 = [ bpp2[0] + (bpp1 - bpp0)[1], bpp0[1] ]; bpp4 = [ bpp3[0], bpp0[1] + mainwall_th ]; lppC = bpp3 + [ 0, -recess_gap_end ]; +lppF = lppC + [ handle_height, 0 ]; + s0 = battery_wdth/2; +s0i = s0 - battery_th/2; s1 = s0 + smallwall_th; +l1 = s1 - handle_inward; +l0 = l1 - handle_len; + echo( bpp0, bpp1, @@ -95,6 +105,11 @@ module LidHalfPlan(){ ]); } +module HandleHalfPlan(){ + translate(lppE) + square(lppF - lppE); +} + module ExtrudePlan(from,to){ rotate([0,-90,0]) for (mj=[0,1]) { @@ -118,10 +133,18 @@ module PlanDemo(){ ////toplevel module Base(){ ////toplevel ExtrudePlan(0,s1) BaseHalfPlan(); - ExtrudePlan(s0,s1) SideHalfPlan(); - ExtrudePlan(s0 - battery_base_indent_fromside_inside, - s0 - battery_base_indent_fromside_outside - ) BaseHalfPlan(indent = battery_base_indent); + difference(){ + union(){ + ExtrudePlan(s0i, s1) SideHalfPlan(); + ExtrudePlan(s0 - battery_base_indent_fromside_inside, + s0 - battery_base_indent_fromside_outside + ) BaseHalfPlan(indent = battery_base_indent); + } + for (m=[0,1]) + mirror([m,0,0]) + translate([s0i, 0, bpp7[0] - 0.1]) + cylinder(r= battery_th/2, h=100, $fs=0.5); + } } module BaseHalfTest(){ ////toplevel @@ -134,6 +157,7 @@ module BaseHalfTest(){ ////toplevel module Lid(){ ////toplevel ExtrudePlan(0,s1) LidHalfPlan(); + ExtrudePlan(l0,l1) HandleHalfPlan(); } module Demo(){ ////toplevel