front_wall_th = 0.75;
// egress_w = 8.0;
-wall_y_min = -board_l - side_wall_th;;
+wall_y_min = -board_l - side_wall_th; // XXXX remove
+main_y_min = -board_l - side_wall_th;
ceil_y_min = wall_y_min - 5;;
small_walls = [
chip_cutout = [[ -sw_to_edge + 4.20, -3.75 ],
[ -sw_to_edge + 11.95, -11.90 ]];
+strain_w = 2.0 + 0.5;
+strain_t = 1.0 + 0.5;
+strain_pitch_across = 5;
+strain_pitch_along = 10;
+
+// calculated
+
+strain_0_y_c = main_y_min - strain_w/2;
+strain_1_y_c = strain_0_y_c - strain_pitch_along;
+total_y_min = strain_1_y_c - strain_w/2 - side_wall_th;
+
module BothSides(){
for (m=[0,1]) {
mirror([m,0]) {
}
FrontWallsPlan(usb_tongue_w_slop);
rectfromto([ -board_w/2 - side_wall_th + 0, - board_l ],
- [ +board_w/2 + side_wall_th, wall_y_min ]);
+ [ +board_w/2 + side_wall_th, total_y_min ]);
}
-module Top(){
+module Top(){ ////toplevel
linextr(0, usb_wall_h)
TopSmallWallsPlan();
linextr(usb_wall_h - usb_ceil_th, usb_wall_h)
TopMainWallsPlan();
}
-Top();
+module Bottom(){ ////toplevel
+}